Portability in high-performance quantum-circuit simulation need not begin at the kernel. We present QSimAdv, which makes late binding, rather than a common kernel, the basis of vendor independence. Representation, operator lowering, and data placement are bound only when their required inputs become available. Before full-state allocation, circuit, noise, and output inspection can route eligible g
QSimAdv is a high-performance quantum-circuit simulator architecture that achieves vendor independence through late binding rather than relying on a common kernel. This approach allows representation, operator lowering, and data placement to be bound only when required inputs are available, enabling portability above the kernel boundary while maintaining native execution performance.
The system was realized on NVIDIA GH200 and AMD MI250X/EPYC systems, demonstrating strong performance across local and distributed execution environments. Key benchmarks show that QSimAdv leads both Aer Hopper configurations at N=32 and Aer's HIP backend at shared MI250X sizes from N=24 to 30, with strong scaling achieving speedups from one to eight ranks on the Setonix cluster.
QSimAdv is presented as a late-bound, vendor-agnostic architecture for high-performance quantum-circuit simulation. Rather than treating portability as a problem to be solved at the kernel level—where all backends are forced through a common execution core—the work argues that independence should arise from deferred specialization. In QSimAdv, the concrete state representation, operator lowering strategy, and data-placement decisions are not fixed in advance. Instead, they are bound only after the relevant inputs—such as circuit structure, noise model, and requested outputs—are available. This allows the system to inspect a simulation workload before committing to a full-state allocation or a single execution path.
The key contribution is an architectural separation between the portable description of a quantum simulation and the performance-critical decisions that determine how it is executed. By delaying binding, QSimAdv can route eligible gate-level work, choose more compact or hardware-friendly representations, and place data according to the target accelerator or memory hierarchy. This design preserves vendor independence without requiring every backend to conform to a monolithic kernel, while still enabling performance optimizations that are highly specific to a given workload and platform.
The work matters because high-performance quantum simulation is inherently heterogeneous: circuits vary in structure, noise assumptions vary, output requirements vary, and accelerator capabilities vary widely. A late-bound architecture can adapt to that heterogeneity more effectively than a fixed, common-kernel design. In practice, this approach can improve portability across vendors, reduce the cost of integrating new backends, and allow simulator frameworks to exploit specialized representations and hardware features without sacrificing the generality needed for research and production workloads.